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lite-on dcc release lite-on technology corp. / optoelectronics no.90,chien 1 road, chung ho, new taipei city 23585, taiwan, r.o.c. tel: 886-2-2222-6181 fax: 886-2-2221-1948 / 886-2-2221-0660 http://www.liteon.com/opto led displayproduct data sheetLTM-0305M-01 spec no.: ds30-2003-153effective date: 09/10/2003revision: - bns-od-fc001/a4 bns-od-fc001/a4 bns-od-fc001/a4 bns-od-fc001/a4
lite - on technology corpor ation property of lite - on only title : ltm - 0305m - 01 page: 1 of 15 bns - od - c131/a4 features 0.4 inch (10.5 mm) digit height nine - digit, right hand decimal solid state reliability stackable horizontally categorized for luminous intensity 8 - step dimming circuitry wide viewing angle serial interface for clock, data, input, syrobe pins cmos technology description the ltm - 0305m - 01 is a 0.4 inch (10.5 mm) digit display. it has a built - in pt6961 mos ic. the mos ic produced with n - channel silicon gate technology. the device is a multi - color applicable displa y , it uses red orange led chips ( gaasp epi on gap substrate), green led chips ( gap epi on gap substrate), amber led chips ( gaasp epi on gap substrate) and yellow led chips ( gaasp epi on gap substrate). this device is covered with a black pattern film, and packaged with white epoxy. device part no description multi - color ltm - 0305m - 01 multiplex with ic driver
lite - on technology corpor ation property of lite - on only title : ltm - 0305m - 01 page: 2 of 15 bns - od - c131/a4 package dimensions notes: all dimensions are in millimeters. tolerances are 0.25mm(0.01) unless othe rwise
lite - on technology corpor ation property of lite - on only title : ltm - 0305m - 01 page: 3 of 15 bns - od - c131/a4 internal circuit diagram
lite - on technology corpor ation property of lite - on only title : ltm - 0305m - 01 page: 4 of 15 bns - od - c131/a4 pin connection no. connection 1 gnd 2 dout 3 clk 4 stb 5 k3 6 vdd 7 ks4 8 ks3 9 ks2 10 ks1 11 din 12 ks5 13 ks6 14 ks7 15 ks8 16 ks9 17 ks10 18 k2 19 k1
lite - on technology corpor ation property of lite - on only title : ltm - 0305m - 01 page: 5 of 15 bns - od - c131/a4 p - gnd ground pin d out data output pin (n - channel, open - drain) this pin outputs serial data at the failing edge of the shift clock. d in data input pin this pin inputs serial data at the rising edge of the shift clock (starting from the lower bot) clk clock input pin this pin reads serial data at rising edge and outputs data at the falling edge. stb serial interface strobe pin the data input after the stb has fallen is processed as a command. when this pin is high, clk is ignored. dd power supply
lite - on technology corpor ation property of lite - on only title : ltm - 0305m - 01 page: 6 of 15 bns - od - c131/a4 electrical optical char acteristics at ta=25 green parameter symbol min. typ. max. unit test condition average luminous intensity iv 450 900 ucd i p = 25ma 1/8 duty peak emission wavelength p 565 nm i f = 20ma spectral line half - width 30 nm i f = 20ma dominant wavelength d 569 nm i f = 20ma luminous intensity matching ratio iv - m 2:1 i f = 20ma red orange( icon) parameter symbol min. typ. max. unit test condition average luminous intensity iv 450 900 ucd i p = 25ma 1/8 duty peak emission wavelength p 630 nm i f = 20ma spectral line half - width 40 nm i f = 20ma dominant wavelength d 621 nm i f = 20ma luminous intensity matching ratio iv - m 2:1 i f = 20ma amber( icon) parameter symbol min. typ. max. unit test condition average luminous intensity iv 450 900 ucd i p = 25ma 1/8 duty peak emission wavelength p 610 nm i f = 20ma spectral line half - width 35 nm i f = 20ma dominant wavelength d 602 nm i f = 20ma luminous intensity matching ratio iv - m 2:1 i f = 20ma
lite - on technology corpor ation property of lite - on only title : ltm - 0305m - 01 page: 7 of 15 bns - od - c131/a4 functional description commands a command is the first byte (b0 to b7) inputted to pt 6961 via the d in pin after stb pin has changed from high to low state. if for some reason the stb pin is set to high while data or commands are being transmitted, the serial communication is initialize d, and the data/commands being transmitted are considered invalid. commands 1: display mode setting commands the display mode setting commands determine the number of segments and grids to be used (11 segments, 7 grids). as stated earlier a command is th e first one byte (b0 to b7) transmitted to pt6961 via the d in pin when stb is low. however, for these commands, the bit 3 to bit 6 (b2 to b5) are ignored, bit 7 & bit 8 (b6 to b7) are given a value of 0. msb lsb 0 0 - - - - 1 1 not relevant display mode setting: 11: 7 grids, 11 segments commands 2: data setting commands the data setting commands executes the data write or data read modes for pt6961. the data setting command, the bits 5 and 6(b4, b5) are ignored, bit 7(b6) is given the value of 1 while bit 8(b7) is given the value of 0. please refer to the diagram below. when power is turn on, bit 4 to bit 1( b3 to b0) are given the value of 0. msb lsb 0 1 - - b3 b2 b1 b0 data write & read mode settings not relevant 00: write data to display mode 10: read key data address increment mode settings(display mode) 0: increment address after d ata has been written 1: fixes address mode settings: 0: normal operation mode 1: test mode
lite - on technology corpor ation property of lite - on only title : ltm - 0305m - 01 page: 8 of 15 bns - od - c131/a4 commands 3: address setting commands address setting commands are used to set the address of the display memory. the address is considered valid if it has a value of 00h to 0dh. if the address is set to 0eh or higher, the data is ignored until a valid address is set. when power is turned on, the address is set at 00h. please refer to the diagram below. msb lsb 1 1 - - b3 b2 b1 b0 not relevant add ress: 00h to 0dh display mode and ram address data transmitted from an external device to pt6961 via the serial interface are stored in the display ram and are assigned address. the ram addresses of pt6961 are gi ven below in 8 bits unit. sg1 sg4 sg5 sg8 sg9 sg12 b0 b3 b4 b 7 xxh l xxh u lower 4 bits higher 4 bits 00h l 00h u 01h l dig1 02h l 02h u 03h l dig2 04h l 04h u 05h l dig3 06h l 06h u 07h l dig4 08h l 08h u 09h l dig5 0ah l 0ah u 0bh l dig6 0ch l 0ch u 0dh l dig7
lite - on technology corpor ation property of lite - on only title : ltm - 0305m - 01 page: 9 of 15 bns - od - c131/a4 commands 4: display control commands the display control commands are used to turn on or off a display. it also used to set the pulse width. please refer to the diagram be low. when the power is turned on, a 1/16 pulse width is selected and the displayed is turned off( the key scanning is stopped). msb lsb 1 0 - - b3 b2 b1 b0 dimming quantity settings not relevant 000: pulse width = 1/16 001: pulse width = 2/16 010: pulse width = 4 /16 011: pulse width = 10/16 100: pulse width = 11/16 101: pulse width = 12/16 110: pulse width = 13/16 111: pulse width = 14/16 display settings: 0: display off 1: display on
lite - on technology corpor ation property of lite - on only title : ltm - 0305m - 01 page: 10 of 15 bns - od - c131/a4 scanning and display timing the key scanning and display timing diagram is given below. one cycle of key scanning consists of 2 frames. the data of the time are 10x3 matrix is stored in the ram.
lite - on technology corpor ation property of lite - on only title : ltm - 0305m - 01 page: 11 of 15 bns - od - c131/a4 scanning and display timing the following diagram shows the pt6961 serial communication format. the d out pin is an n - channel, open drain output pin, therefore, it is highly recommended that an external pull - up resistor( 1kohms to 10kohms) mus t be connected to d out. where: twait( waiting time) ? 1us it must be noted that when the data is read, the waiting time( t wait ) between the rising of the eighth clock that has set the command and the falling of the first clock that has read the data i s greater or equal to 1us.
lite - on technology corpor ation property of lite - on only title : ltm - 0305m - 01 page: 12 of 15 bns - od - c131/a4 switching characteristic waveform pt6961 switching characteristics waveform is given below. where: pw clk (clock pulse width) ? 400ns pw stb (strobe pulse width) ? 1us t setup (data setup time) ? 100ns t hold (data hold time) ? 100ns t clk - stb (clock - strobe time) ? 1uns t thz (fall time) ? 10us t tzh (rise time) ? 1us t pzl (propagation delay time) ? 100ns f osc = oscillation frequency t plz (propagation delay ti me) ? 300ns t tzl ? 1us t tlz ? 10us note: test condition under t thz ( pull low resistor = 10k ohms, loading capacitor = 300 pf ) t tlz ( pull low resistor = 10k ohms, loading capacitor = 300 pf )
lite - on technology corpor ation property of lite - on only title : ltm - 0305m - 01 page: 13 of 15 bns - od - c131/a4 applications d isplay memory is updated by incrementing address. please refer to the following diagrams. where: command1: display mode setting command command2: data setting command command3: address setting command data 1 to n: transfer display data( 14 bytes max.) command4: display control command the following diagram shows the waveforms when updating specific address. where: command2: data setting command command3: address setting command data: display data
lite - on technology corpor ation property of lite - on only title : ltm - 0305m - 01 page: 14 of 15 bns - od - c131/a4 recommended software programming flowchart note: 1. command1: display mode commands 2. command2: data setting commands 3. command3: address setting commands 4. command4: display control comamnds 5. when ic power is applied for the first time, the contents of the display ra m is not defined; thus, it is strongly suggested that the contents of the display ram mist be cleared during the initial setting. start delay 200 ms set command 2 (write data) set command 3 clear display ram (see note 5) set command 1 set command 4 (88h~8fh: display on) main program set com mand 2 (read key & write data included) set command 3 set command 1 set command 4 end main loop initial setting
lite - on technology corpor ation property of lite - on only title : ltm - 0305m - 01 page: 15 of 15 bns - od - c131/a4 absolute maximum ratings (unless otherwise stated, ta = 25 ? c, gnd = 0 v) parameter symbol ratings unit supply voltage v dd - 0. 5 to +7 v logic input voltage v i - 0.5 to v dd +0.5 v driver output current i olgr +250 ma i ohsg - 50 ma maximum driver output current/total i total 400 ma recommanded operating range (unless otherwise stated, ta = - 20 to 70 ? c, gnd = 0 v) parameter symbo l min. typ. max. unit logic supply voltage v dd 4.5 5 5.5 v dynamic current(see note) i dddyn - - 5 ma high - level input voltage v ih 0.8v dd - v dd v low - level input voltage v il 0 - 0.3 v dd v note: test condition: set display control commands = 80h recomm anded operating range (unless otherwise stated, ta = - 20 to 70 ? c, gnd = 0 v) parameter symbol test condition min. typ. max. unit high - level output current i ohsg1 v o =v dd - 2v sg1 to sg12 - 20 - 25 - 40 ma i ohsg2 v o =v dd - 3v sg1 to sg12 - 25 - 30 - 50 ma low - leve l output current i lgr v o =0.3v gr1 to gr7 100 140 ma low - level output current i oldout v o= 0.4v 4 ma segment high - level output current tolerance i tolsg1 v o =v dd - 3v sg1 to sg12 ? v ih - 0.8 v dd - 5 v low - level input volta ge v il - 0 - 0.3 v dd v oscillation frequency f osc r=51kohms 350 500 650 khz

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